Design Verification engineer/Senior (System Verilog/UVM)
Job position: Design Verification engineer/Senior (System Verilog/UVM), Ho Chi Minh City, Vietnam
Job Description: Job Ref: QV79VR4R Title: Design Verification Engineer Location: Onsite in HCM City Requirements: 4+ years experience with Design Verification Strong experience with SystemVerilog Strong experience developing te......
Job Location: Ho Chi Minh CitySalary: unavailable
Company: People Profilers
Job date: 04 Apr 2024
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